IBDT Ranging Hardware with ATmega644 + AT86RF231. More...
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Defines | |
| #define | DDR_KEY DDRD |
| #define | DDR_SPI (DDRB) |
| #define | DDR_TRX_RESET DDRD |
| #define | DDR_TRX_SLPTR DDRD |
| #define | DEFAULT_SPI_RATE (SPI_RATE_1_2) |
| #define | DI_TRX_IRQ() {EIMSK &= (~(TRX_IRQ));} |
| #define | EI_TRX_IRQ() {EIMSK |= (TRX_IRQ);} |
| #define | HIF_TYPE HIF_UART_0 |
| #define | HWTIMER_REG (TCNT1) |
| #define | HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU) |
| #define | HWTIMER_TICK_NB (0.001/HWTIMER_TICK) |
| #define | HWTMR_PRESCALE (64) |
| #define | INVERSE_KEYS (1) |
| #define | LED_DDR DDRD |
| #define | LED_MASK (0x30) |
| #define | LED_NUMBER (2) |
| #define | LED_PORT PORTD |
| #define | LED_SHIFT (4) |
| #define | LEDS_INVERSE (1) |
| #define | MASK_KEY (0x0C) |
| #define | MASK_TRX_RESET (_BV(PD6)) |
| #define | MASK_TRX_SLPTR (_BV(PD7)) |
| #define | PIN_KEY PIND |
| #define | PORT_KEY PORTD |
| #define | PORT_SPI (PORTB) |
| #define | PORT_TRX_RESET PORTD |
| #define | PORT_TRX_SLPTR PORTD |
| #define | PULLUP_KEYS (1) |
| #define | SHIFT_KEY (2) |
| #define | SLEEP_ON_KEY() |
| #define | SLEEP_ON_KEY_INIT() |
| #define | SLEEP_ON_KEY_vect PCINT0_vect |
| #define | SPI_DATA_REG SPDR |
| #define | SPI_MISO _BV(PB6) |
| #define | SPI_MOSI _BV(PB5) |
| #define | SPI_SCK _BV(PB7) |
| #define | SPI_SELN_HIGH() PORT_SPI |= SPI_SS; SREG = sreg |
| #define | SPI_SELN_LOW() uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS |
| #define | SPI_SS _BV(PB4) |
| #define | SPI_TYPE SPI_TYPE_SPI |
| #define | SPI_WAITFOR() do { while((SPSR & _BV(SPIF)) == 0);} while(0) |
| #define | TIMER_INIT() |
| #define | TIMER_IRQ_vect TIMER0_COMPA_vect |
| #define | TIMER_POOL_SIZE (8) |
| #define | TIMER_TICK (HWTIMER_TICK * HWTIMER_TICK_NB) |
| #define | TRX_IRQ _BV(INT2) |
| #define | TRX_IRQ_INIT() |
| #define | TRX_IRQ_vect INT2_vect |
| #define | TRX_TSTAMP_REG TCNT1 |
IBDT Ranging Hardware with ATmega644 + AT86RF231.
The wiring of the radio and the ATmega is shown below:
AVR RF231
--- ----- PD3:2 <-- KEY
PD5:4 --> LED| #define DDR_KEY DDRD |
DDR register for keys
| #define DDR_SPI (DDRB) |
DDR register for SPI port
| #define DDR_TRX_RESET DDRD |
DDR register for RESET pin
| #define DDR_TRX_SLPTR DDRD |
PORT register for SLP_TR pin
| #define DEFAULT_SPI_RATE (SPI_RATE_1_2) |
ID String for this hardware
| #define DI_TRX_IRQ | ( | ) | {EIMSK &= (~(TRX_IRQ));} |
high level INT0 disable TRX interrupt
| #define EI_TRX_IRQ | ( | ) | {EIMSK |= (TRX_IRQ);} |
enable TRX interrupt
| #define HIF_TYPE HIF_UART_0 |
Type of the host interface.
| #define HWTIMER_REG (TCNT1) |
name of the register where the clock ticks can be read
| #define HWTIMER_TICK ((1.0*HWTMR_PRESCALE)/F_CPU) |
hardware timer clock period in us (usually: prescaler / F_CPU)
| #define HWTIMER_TICK_NB (0.001/HWTIMER_TICK) |
number of hardware timer ticks, when IRQ routine is called, set to 1ms
| #define INVERSE_KEYS (1) |
= 1, if low level at port means KEY pressed
| #define LED_DDR DDRD |
DDR register for LEDs
| #define LED_MASK (0x30) |
MASK value for LEDs (msb aligned)
| #define LED_NUMBER (2) |
number of LEDs for this board
| #define LED_PORT PORTD |
PORT register for LEDs
| #define LED_SHIFT (4) |
SHIFT value for LEDs
| #define LEDS_INVERSE (1) |
= 1, if low level at port means LED on
| #define MASK_KEY (0x0C) |
MASK value for keys (msb aligned)
| #define MASK_TRX_RESET (_BV(PD6)) |
PIN mask for RESET pin
| #define MASK_TRX_SLPTR (_BV(PD7)) |
PIN mask for SLP_TR pin
| #define PIN_KEY PIND |
PIN register for keys
| #define PORT_KEY PORTD |
PORT register for keys
| #define PORT_SPI (PORTB) |
PORT register for SPI port
| #define PORT_TRX_RESET PORTD |
PORT register for RESET pin
| #define PORT_TRX_SLPTR PORTD |
DDR register for SLP_TR pin
| #define SHIFT_KEY (2) |
SHIFT value for keys
| #define SLEEP_ON_KEY | ( | ) |
do{\ EIMSK |= _BV(PCIE0);\ set_sleep_mode(SLEEP_MODE_PWR_DOWN);\ sleep_mode();\ EIMSK &= ~_BV(PCIE0);\ } while(0)
| #define SLEEP_ON_KEY_INIT | ( | ) |
do{\ PCMSK0 |= _BV(PCINT2);\ }while(0)
| #define SPI_DATA_REG SPDR |
abstraction for SPI data register
| #define SPI_MISO _BV(PB6) |
PIN mask for MISO pin
| #define SPI_MOSI _BV(PB5) |
PIN mask for MOSI pin
| #define SPI_SCK _BV(PB7) |
PIN mask for SCK pin
| #define SPI_SELN_HIGH | ( | ) | PORT_SPI |= SPI_SS; SREG = sreg |
set SS line to high level
| #define SPI_SELN_LOW | ( | ) | uint8_t sreg = SREG; cli(); PORT_SPI &=~SPI_SS |
set SS line to low level
| #define SPI_SS _BV(PB4) |
PIN mask for SS pin
| #define SPI_WAITFOR | ( | ) | do { while((SPSR & _BV(SPIF)) == 0);} while(0) |
wait until SPI transfer is ready
| #define TIMER_INIT | ( | ) |
do{\ TCCR0B = _BV(CS01) | _BV(CS00);\ TCCR0B |= _BV(WGM02); \ OCR0A = HWTIMER_TICK_NB; \ TIMSK0 |= _BV(OCIE0A);\ }while(0)
| #define TIMER_IRQ_vect TIMER0_COMPA_vect |
symbolic name of the timer interrupt routine that is called
| #define TIMER_POOL_SIZE (8) |
number of software timers running at a time
| #define TIMER_TICK (HWTIMER_TICK * HWTIMER_TICK_NB) |
period in us, when the timer interrupt routine is called
| #define TRX_IRQ _BV(INT2) |
interrupt mask for GICR
| #define TRX_IRQ_INIT | ( | ) |
do{\ EICRA = _BV(ISC20) | _BV(ISC21);\ EIMSK |= (TRX_IRQ);\ } while(0)
configuration of interrupt handling
| #define TRX_IRQ_vect INT2_vect |
interrupt vector name
| #define TRX_TSTAMP_REG TCNT1 |
timestamp register for RX_START event
1.7.1